Heterogeneous integration is increasingly becoming crucial for semiconductor innovation, with advanced packaging technologies helping to enhance the value of semiconductor products, increase functionality, maintain and improve performance, and reduce costs. As one of the most mainstream advanced packaging technologies currently in use, fan-out packaging is further divided into fan-out wafer-level packaging (FOWLP) and fan-out panel-level packaging (FOPLP). Although their processes and applications differ, both allow for a thinner and lighter final product.

　　Yu Daquan, chairman of Xiamen Yuntian Semiconductor Technology Co., Ltd., pointed out that the prototype of FOPLP technology is embedded substrate packaging, which embeds some passive or power devices in the substrate for RDL interconnection, forming a miniaturized solution. Subsequently, the industry found that compared to FOWLP, it has a larger package size and lower cost, quickly becoming a research hotspot in the packaging field.

　　However, FOPLP still faces many challenges. The main challenges in application are that the types of products currently suitable for this technology are not rich enough and are relatively single; the main challenges in equipment and processes include exposure, development, precision wiring, and a series of challenges in Die-to-Wafer transfer accuracy, efficiency, and speed. In addition, whether it is FOWLP or FOPLP, fan-out packaging heterogeneously integrates various chips with extremely small sizes but powerful functions. How to reasonably arrange them on the PCB and achieve efficient electrical connection to form an effectively operating system, and how to form a high film thickness uniformity and high-resolution RDL (Redistribution layer) technology has become one of the key technological challenges.

　　RDL becomes an important challenge in the heterogeneous integration of fan-out packaging

　　RDL uses line width and spacing (line/space; L/S, also known as critical dimension, CD) for measurement. Line width and spacing refer to the width of the metal wiring and the distance between them. It actually adds one or more layers to the original wafer. First, a copper seed layer is deposited on the substrate, then a layer of photoresist is applied to this structure, and then it is patterned using lithographic equipment. Finally, the electroplating system deposits the copper metallization layer to form the final RDL. With the development of process technology, the CD of the metal wiring formed by RDL will become smaller and smaller, thus providing higher interconnection density.

　　Source: "SiP and Advanced Packaging Technology", CICC Research Department

　　Manz, a high-precision equipment manufacturer, believes that large-panel RDL technology provides a cost-effective and large-area manufacturing method. Manufactured in the same way, the RDL process concept is suitable for the manufacturing of fine-featured microLEDs and passive devices, which can reduce costs by 66% compared to FOWLP (300mm wafer, chip size 8mm × 8mm). However, the challenge is that as the FOPLP substrate size increases, large-area process uniformity and carrier handling methods used for RDL production become key, including increased weight due to larger substrates, material diversification and warping; maintaining specific substrate size during the process to produce low variability and uniform line pattern dimensions; and electroplating thickness uniformity.

　　A copper plating process that can provide uniform surface lines without additional post-processing is the key to successfully achieving the RDL plating layer for FOPLP packaging.

　　In addition to the above technical challenges, RDL also puts forward new requirements for related semiconductor equipment. The production process involves lithography machines, etching machines, sputtering platforms, and CVD and electroplating equipment. Before FOPLP technology forms a complete industry standard, packaging plants, design companies, and equipment and material companies still need to cooperate to achieve comprehensive innovation in processes, electroplating chemistry, and manufacturing equipment to solve problems related to within-feature (WiF) uniformity, coplanarity, defects, reliability, and production volume.

　　Manz emphasizes that close cooperation between equipment manufacturers and material suppliers to solve customers' structural design and process integration problems can establish standard process flows and introduce automation and production monitoring. In addition, the RDL line and upstream and downstream equipment lines also need to be integrated. With Manz's rich experience in equipment, process flow, and automation software and hardware integration, it can greatly help optimize production line design, and assist customers in improving yield and yield, thereby enabling the FOPLP process to provide more efficient and cost-effective terminal products for end consumers.

　　Next-generation RDL applications face new plating and integration challenges

　　Fan-out packaging uses RDL technology to connect different chips together, which is a very important interconnection technology. Yu Daquan explained that fan-out technology can be mainly divided into three types: chip-first/face-down, chip-first/face-up, and chip-last (sometimes also called RDL first). The first two chip-first methods require fine wiring on the fan-out surface, while RDL-first requires fine wiring on the wafer and panel (carrier), and the wiring capability will be higher. He believes that if panel-level packaging moves towards RDL first in the future, the RDL required will be very precise, and the technical challenges will be even higher.

　　In low-density fan-out packaging, the main RDL is greater than 8μm (8-8μm), while high-density fan-out packaging has multiple layers of RDL, with CD at 8-8μm and below. Redistribution layers with smaller CDs can reduce the number of redistribution layers in fan-out packaging. This can reduce the overall packaging cost and improve yield, so the CD of RDL depends on the application. In the foreseeable future, packaging of 5-5μm and above will still be the mainstream technology. In the high-end field, ASE Technology is moving towards RDL of 1-1μm and below. At the same time, TSMC is also following closely, currently researching 0.8μm and 0.4μm fan-out technologies.

　Regarding the development path of RDL, Yu Daquan pointed out that heterogeneous integration in advanced packaging needs to be carried out through RDL for I/O transformation. If RDL technology is introduced into 2.5D/3D IC vertical chip stacking in the future, it will also become a very important electrical interconnection solution. Moreover, from the cost perspective, the cost of RDL in FOWLP is very high, especially for 2 or 3 layers and above.

　　Currently, the mainstream RDL is still 5-5μm and above. When the demand for 5G increases and the bandwidth demand for memory increases, it will drive the market demand for smaller CD RDLs of 3-3μm and 2-3μm and below. The Yole report points out that cloud infrastructure, 5G, autonomous driving, and the artificial intelligence revolution will shape the packaging trends of the next decade, and higher-density multi-layer RDL stacking methods will be one of the solutions that help meet the "beyond Moore's Law" requirements at the system level.

　　Regardless, as RDL moves toward finer interconnect lines and more layers of three-dimensional stacking, the reliability requirements for conductors, such as high mechanical strength, thermal stability, and fatigue resistance, are becoming increasingly stringent. This not only requires new materials and processes but also poses more challenging demands on the production yield and reliability of packaging. Material and equipment manufacturers need to introduce new materials or process equipment to enable industry players to move advanced packaging toward mass production. Manz Asia-Pacific Technology will continuously optimize relevant process equipment to provide comprehensive, high-capacity, and cost-effective solutions to help customers achieve continuously evolving processes. FOPLP technology is coming to the forefront.